Digital Exchange and VOIP

The Control Register is an eight bit register which may be written to or read from the microprocessor port. This register is accessed when A5 is low. When A5 is high, one of the other memory blocks, Data Memory, Connection Memory Low or Connection Memory High, is visible to the microprocessor port. CRb4 and CRb3 determine which of the memory blocks is being accessed and CRb2, CRb1 and CRb0

determine which portion of the selected memory block is visible. Each memory block portion selected by CRb2-0 is 32 bytes long, corresponding to the 32 channels of one of the ST- BUS streams. The state of A4-A0 determines which byte in a 32 byte segment is accessed by the microprocessor at any one time. Figure 3 shows the relationship between CRb4-0, A5-A0, and channel accesses in the MT8980. CRb6 is an overall Message mode bit. This bit can override the setting of the CMHb2 and the CMHb0 of an output channel. If CRb6 is set to a logical ‘1’, all output channels are in Message mode and the CMHb0 and the CMHb2 of each channel has no effect. If CRb6 is low, the Connection Memory High bits determine the mode of their respective channels (Switching or Message) and whether the channel is in a high impedance state or not.