mov sdata,regcon_low_data_source
clr CS
setb DAS
pre2:
jnb DTA,done2
jmp pre2
done2:
clr DAS
setb CS

;writing connection in connection memory low
clr DAS
mov address,channel

MOV A,source
RR A
RR A
RR A
mov sdata,A
clr CS
setb DAS
pre3:
jnb DTA,done3
jmp pre3
done3:
clr DAS
setb CS

MICROPROCESSOR INTERFACE

The microprocessor port consists of a data bus for information transfer, an address bus, a chip enable, two signals for synchronizing microprocessor bus transfers, and a transfer direction control signal. The data bus is eight bits wide and carries control information for the MT8980 from the microprocessor. The six address bits, A0-A5, help determine which of the individual locations within the MT8980 are accessed.

The Select signal (CS) is the chip enable. If CS is high, no access to the MT8980 is possible. Normally, when DS is brought low, most systems remove the CS signal. This is not mandatory, as the MT8980 will not drive the data bus or receive information from the data bus unless DS is high. The Data Strobe signal (DS) and the Data Acknowledge signal (DTA) perform transfer synchronization. At the rising edge of DS, all other control information must be valid. On the falling edge of DS, data from the microprocessor or data from the MT8980 is valid. DS is usually not brought low until after the MT8980 brings the DTA signal low, which occurs when the MT8980 is ready to accept or provide data. Once DS is low, the MT8980 brings DTA high, terminating the bus cycle.


The Read/Write signal (R/W) determines the direction of information flow. When the signal is high, information can be read from the MT8980 by the microprocessor. When R/W is low, data from the microprocessor may be written to the MT8980.